TOUT_CNT=Val_0x0
Timeout Control Register
| TOUT_CNT | Data Timeout Counter Value. This value determines the interval by which DAT line timeouts are detected. The timeout clock frequency is generated by dividing the base clock (BCLK) value by this value. When setting this bit field, the user should prevent inadvertent timeout events by clearing the SDMMC_ERROR_INT_STAT_EN_R[DATA_TOUT_ERR_STAT_EN] bit. The values for these bits are: Note: During a boot operating in an eMMC mode, an application must configure the boot data timeout value (approximately 1 second) in this bit field. 0 (Val_0x0): TMCLK x 2^13 1 (Val_0x1): TMCLK x 2^14 14 (Val_0xE): TMCLK x 2^27 |